A 1.8V 2nd-Order [sigma delta] Modulator

Abstract

Low-voltage, low-power analog-to-digital converters provide a critical interface in portable mixed-signal electronic systems. The robustness and tolerance of the sigma-delta modulator technique over other data-converter techniques make it an ideal choice in applications where low voltage and high-dynamic range are a must. This thesis deals with the design and implementation of a low-voltage, low-power 2nd-order sigma-delta modulator with a single 1.8 V power supply using conventional threshold voltage transistors. All the circuit blocks are integrated on one chip, and the input common-mode voltage is set at mid-rail, resulting in low power dissipation, minimum off-chip components, and high efficiency, flexibility and compatibility. The design is useful for voice applications in personal communications systems supplied by two nickel-cadmium or alkaline batteries. The modulator consists of four circuit blocks: the biasing, the operational amplifier, the comparator-latch, and the four-phase clock generator. A high DC gain, large output swing operational amplifier with a low-voltage power supply was implemented using a fully-differential folded-cascode input stage followed by a common-source output stage, combined with a switched-capacitor common-mode feedback circuit. Based on fully-differential switched-capacitor techniques, the modulator was implemented using a 3.3 V, double-poly, 0.35[mu]m CMOS process. The modulator exhibits a 15-bit dynamic range for a 7 kHz bandwidth, and a 14-bit dynamic range for a 20 kHz bandwidth at an oversampling frequency of 2.56 MHz. The complete 2nd-order modulator has a power dissipation of 0.99 mW, and occupies 0.31 mm2 of the area excluding bonding pads.