200GS/s Analog to Digital Converter Frontend in SiGe BiCMOS

Date

2022-11

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Abstract

This thesis investigates time-interleaved analog to digital converter front end circuits for use in next-generation fiber optic receivers capable of 200 GS/s with analog bandwidths reaching up to the Nyquist frequency. Measurements were conducted on an existing time-interleaved ADC front end which displayed record-breaking performance while sampling at 200 GS/s. A full four-way 200GS/s time-interleaved ADC front end employing a novel architecture was designed and fabricated in a 55nm SiGe BiCMOS process technology. The constituent track and hold amplifier was measured and achieved a record-breaking 101 GHz of track mode bandwidth. Finally, a 60GHz digitally-controlled oscillator was also designed and fabricated in 22nm FDSOI-CMOS technology with the goal of producing on-chip high-frequency clock signals to enable a full time- interleaved ADC front end system on chip.

Description

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ADC, BiCMOS, Frontend, Switched Emitter Follower, THA

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Creative Commons

Attribution 4.0 International

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